# Hardware Description Thinking

Computer Science I · Basic Digital Design · https://tryals.app/learn/computer-science-i/hardware-description-thinking

## Describing Hardware

Modern chips are too complex to draw by hand. Engineers write a **hardware description language (HDL)**, describing what the hardware should do, and a **synthesizer** turns it into gates. HDL is **not** sequential software. Everything operates **in parallel**: statements describe permanent connections or clocked updates, not lines running one after another.

| Style | What it specifies | Analogy |
| --- | --- | --- |
| **Structural** | How components are wired | Schematic |
| **Behavioral** | What the hardware should do | Intent |

> **Common pitfall:** Reading HDL like a program. Missing that hardware runs **concurrently** leads to fundamentally broken designs.

## ASICs and FPGAs

Designs target two physical destinations. An **ASIC** is fixed silicon: fast and cheap at volume, but costly to design. A programmable device is set electrically after manufacture. The **FPGA** (field-programmable gate array) features a grid of **logic blocks** and programmable **interconnect**.

Logic blocks center on the **lookup table (LUT)**: a tiny memory holding the output for every input combination. A $k$-input LUT realizes _any_ Boolean function using $2^{k}$ bits.

| Stage | What it does |
| --- | --- |
| **Synthesis** | Turns HDL into a gate netlist |
| **Tech Mapping** | Packs netlist into actual LUTs/flip-flops |
| **Place & Route** | Assigns physical blocks and wires |

> **Common pitfall:** Thinking "programmable" means "runs a program". FPGAs are rewired, not executed step-by-step.

## Practice questions

6 of this lesson's 12 practice questions, with answers. The full set is in the app.

### 1. A lookup table stores the output bit for every possible combination of its inputs. How many configuration bits does one 6-input LUT hold?

**Answer:** 64

**Why:** Six inputs give 2^6 = 64 combinations, and the LUT stores one output bit for each, so 64 bits. That is what lets a single LUT become any Boolean function of 6 inputs, the function is not built from gates, it is looked up. Answering 6 or 12 mistakes the number of inputs for the number of things they can spell.

Page: https://tryals.app/practice/computer-science-i/hardware-description-thinking/a-lookup-table-stores-the-output-bit-for-every-possible-combination

### 2. A designer writes a `for` loop over 1000 iterations in synthesisable Verilog and the design will not fit on the chip. What did the loop produce?

A. A syntax error that the tool reported as a fitting failure
B. A single circuit executed a thousand times, which is correct behaviour
C. A thousand copies of the hardware, since synthesis unrolls loops
D. A thousand clock cycles of execution, which exceeded the timing budget

**Answer:** C. A thousand copies of the hardware, since synthesis unrolls loops

**Why:** Hardware is spatial: the loop is unrolled into a thousand instances that all exist simultaneously. Iteration over time requires a state machine that reuses one instance across clock cycles, which is the shift from thinking in instructions to thinking in circuits, and the commonest early mistake in HDL.

Page: https://tryals.app/practice/computer-science-i/hardware-description-thinking/a-designer-writes-a-for-loop-over-1000-iterations-in-synthesisable

### 3. Order the stages by which a hardware description becomes a physical chip.

**Answer:**

1. Write a behavioural description of what the hardware should do
2. Simulate the description to check that its behaviour is what was intended
3. Synthesise the description into gates and cells for the chosen technology
4. Place the cells on the chip and route the wires between them
5. Manufacture the resulting layout

**Why:** Description, then simulation, then synthesis to gates, then place-and-route, then manufacture. Each stage commits the design further and makes changes more expensive, which is why behaviour is verified before any gate is chosen. The designer works at the top of this chain; the tools handle the millions of decisions below.

Page: https://tryals.app/practice/computer-science-i/hardware-description-thinking/order-the-stages-by-which-a-hardware-description-becomes-a-physical

### 4. A hardware description language looks like a programming language and does something quite different. What is the essential difference, and why does it catch newcomers out?

A. Because HDL describes hardware that exists all at once, in parallel.
B. Because HDL cannot express loops or conditionals, unlike programming languages.
C. Because HDL code is interpreted rather than compiled, which changes its timing.
D. Because HDL describes only the layout of the chip and not its behaviour.

**Answer:** A. Because HDL describes hardware that exists all at once, in parallel.

**Why:** Software executes one instruction after another; hardware is all present at once, so two concurrent assignments are two circuits and writing them in the other order changes nothing. The characteristic trap is that a `for` loop *unrolls*, a thousand iterations generates a thousand adders. A conditional becomes a multiplexer, because both branches exist physically.

Page: https://tryals.app/practice/computer-science-i/hardware-description-thinking/a-hardware-description-language-looks-like-a-programming-language-and

### 5. Select every statement that is true of a behavioural hardware description.

A. It is generally more productive to write than a structural description
B. The blocks it describes all operate concurrently
C. It removes the need for a place-and-route stage
D. It states what the hardware should do and leaves the gate-level implementation to the synthesiser
E. Its statements take effect one at a time, in the order they appear in the file

**Answer:** A. It is generally more productive to write than a structural description; B. The blocks it describes all operate concurrently; D. It states what the hardware should do and leaves the gate-level implementation to the synthesiser

**Why:** A behavioural description states intent, describes concurrent hardware, and is far more productive than drawing the structure by hand. It does not run line by line, and it certainly does not remove place-and-route, the cells still have to be positioned and wired however the design was written.

Page: https://tryals.app/practice/computer-science-i/hardware-description-thinking/select-every-statement-that-is-true-of-a-behavioural-hardware

### 6. Sort each fragment of a hardware description by the level it works at.

**Answer:**

- Structural: The output of this multiplexer connects to the input of that register, Create four full adders and chain the carry wire of each into the next
- Behavioural: On each clock edge, if reset then count becomes 0, otherwise count becomes count plus 1, The output is 1 whenever at least two of the three inputs are 1

**Why:** Structural descriptions say how parts are wired together and mirror a schematic; behavioural descriptions say what the hardware should do and leave the gates to the tool. Behavioural work is far more productive, which is why modern designs are written that way and only critical blocks are described structurally.

Page: https://tryals.app/practice/computer-science-i/hardware-description-thinking/sort-each-fragment-of-a-hardware-description-by-the-level-it-works-at