# Processor, Memory, and Buses

Computer Science I · Introduction to Computers · https://tryals.app/learn/computer-science-i/processor-memory-and-buses

## Inside the CPU & Memory

Almost every modern computer uses the **von Neumann architecture**: a **central processing unit (CPU)** linked by buses to a single **main memory** holding both instructions and data.

The **CPU** contains the **control unit** (fetches and decodes instructions), the **arithmetic logic unit (ALU)** (performs computations and logic), and **registers** (ultra-fast local storage).

**Main memory (RAM)** is a large, numbered array of bytes, each with an **address**. RAM is **volatile** (erased when power drops), vastly larger than registers, but much slower.

| Component | Primary Role | Volatility |
| --- | --- | --- |
| **Registers** | Immediate CPU storage | Volatile |
| **Main Memory** | Program/data storage | Volatile |
| **Buses** | Data transport wires | N/A |

## Buses & The von Neumann Trap

**Buses** are shared wires moving data. The **address bus** specifies _which_ cell is wanted ($n$ lines address $2^n$ cells), the **data bus** carries the byte itself, and the **control bus** sends signals like read or write.

> **Common pitfall:** Believing programs and data live in separate memories. In von Neumann design they share the _same_ main memory; a program is just data the CPU interprets as instructions.

This unification lets programs modify code, but also enables security vulnerabilities where malicious input is executed as code.

## Practice questions

5 of this lesson's 11 practice questions, with answers. The full set is in the app.

### 1. Registers hold only a handful of values while main memory holds billions. Why does the CPU keep so tiny a store at all, rather than working directly from memory?

A. Because registers are readable within one clock cycle and memory takes hundreds.
B. Because registers are cheaper per byte than main memory, so a small number saves cost.
C. Because main memory cannot be read and written by the ALU under any circumstances.
D. Because registers hold instructions while main memory holds data, so the two are not interchangeable.

**Answer:** A. Because registers are readable within one clock cycle and memory takes hundreds.

**Why:** Registers sit a fraction of a millimetre from the ALU and read in one cycle; main memory is centimetres away and takes about a hundred. The smallness is not a limitation to overcome but the reason it is fast, more registers means longer wires and larger multiplexers. They are the most expensive storage per byte in the machine, and few because being few keeps them quick.

Page: https://tryals.app/practice/computer-science-i/processor-memory-and-buses/registers-hold-only-a-handful-of-values-while-main-memory-holds

### 2. Storing instructions and data in one memory is what makes a stored-program computer able to treat a program as data, the property compilers and loaders depend on.

**Answer:** True

**Why:** True. The single memory is what lets a compiler emit a program as ordinary bytes, a loader place it, and a debugger inspect it. The cost is the von Neumann bottleneck, one bus carrying both, which is why caches split into separate instruction and data paths internally while keeping one address space.

Page: https://tryals.app/practice/computer-science-i/processor-memory-and-buses/storing-instructions-and-data-in-one-memory-is-what-makes-a

### 3. A CPU running at 3 GHz executes an instruction in well under a nanosecond and waits around 100 nanoseconds for main memory. What does that ratio mean in practice?

A. That the processor should be slowed to match memory speed
B. That memory access patterns matter more than operation counts
C. That instruction count is irrelevant to performance
D. That memory access is the only operation worth optimising

**Answer:** B. That memory access patterns matter more than operation counts

**Why:** A hundred nanoseconds is roughly 300 instructions the processor could have executed instead, so a miss dwarfs the arithmetic. That is why an array often beats a linked list with the same big-O, and why memory layout is a first-order performance concern rather than a detail.

Page: https://tryals.app/practice/computer-science-i/processor-memory-and-buses/a-cpu-running-at-3-ghz-executes-an-instruction-in-well-under-a

### 4. Order the steps by which the CPU reads one byte out of main memory.

**Answer:**

1. The CPU places the cell's address on the address bus
2. The CPU asserts the read signal on the control bus
3. Main memory locates the addressed cell
4. The byte travels back to the CPU along the data bus
5. The CPU stores the byte in one of its registers

**Why:** The address must be presented before the command means anything, and both must arrive before memory can locate the cell and put its contents on the data bus. Only then does the byte reach a register. Expecting the data bus to be used first is the common error, nothing can be transferred before its address is known.

Page: https://tryals.app/practice/computer-science-i/processor-memory-and-buses/order-the-steps-by-which-the-cpu-reads-one-byte-out-of-main-memory

### 5. Select every statement that is true of registers but NOT true of main memory.

A. There are only a few dozen of them
B. They are selected by an address placed on the address bus
C. They are the fastest storage the CPU can reach
D. They lose their contents when power is cut
E. They sit inside the CPU

**Answer:** A. There are only a few dozen of them; C. They are the fastest storage the CPU can reach; E. They sit inside the CPU

**Why:** Registers are on-chip, fastest, and few, all three distinguish them. Being addressed over the address bus is true of main memory, not registers. Losing contents when power is cut is true of both, so it distinguishes nothing; picking it is the trap, because volatility is stated about memory in the lesson and quietly assumed to be unique to it.

Page: https://tryals.app/practice/computer-science-i/processor-memory-and-buses/select-every-statement-that-is-true-of-registers-but-not-true-of-main