Practice question · Match the pairs
Match each field of a 32-bit RISC-V instruction to what it selects.
- opcode (7 bits)
- rd (5 bits)
- rs1 and rs2 (5 bits each)
- funct3 and funct7
- immediate (12 bits, I-type)
- The broad class the instruction belongs to
- Where the two inputs are read from
- A constant carried inside the instruction itself
- Which operation within the class, such as add rather than subtract
- Where the outcome lands, chosen from 32 registers
Hints
- Two fields together narrow down the operation; the opcode alone does not.
- Five bits addresses 32 things, which is how many registers there are.
Show the answer
- opcode (7 bits) → The broad class the instruction belongs to
- rd (5 bits) → Where the outcome lands, chosen from 32 registers
- rs1 and rs2 (5 bits each) → Where the two inputs are read from
- funct3 and funct7 → Which operation within the class, such as add rather than subtract
- immediate (12 bits, I-type) → A constant carried inside the instruction itself
Why
The opcode names the class and funct3 with funct7 pick the exact operation inside it, which is why add and subtract share an opcode. Three separate 5-bit fields name registers, two sources and one destination, because 5 bits is exactly enough for 32 of them. The immediate exists only in formats that trade rs2 and funct7 away for a constant.
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