Practice question · Multiple choice
A designer writes a for loop over 1000 iterations in synthesisable Verilog and the design will not fit on the chip. What did the loop produce?
Hints
- Ask what hardware exists all at once, and what a loop in a description of hardware could therefore mean.
- The design is too large rather than too slow. What does that tell you?
Show the answer
C. A thousand copies of the hardware, since synthesis unrolls loops
Why
Hardware is spatial: the loop is unrolled into a thousand instances that all exist simultaneously. Iteration over time requires a state machine that reuses one instance across clock cycles, which is the shift from thinking in instructions to thinking in circuits, and the commonest early mistake in HDL.
Practise Hardware Description Thinking
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