Practice question · Multiple choice
A datapath holds a value in a register, adds a step to it each clock, and displays the result - drawing on gates, adders, registers and timing at once. Why is understanding each piece separately insufficient to design the system?
Hints
- Widen the adder. What happens to the clock frequency?
- Ask which piece's timing determines every other piece's schedule.
Show the answer
B. Because the pieces constrain each other: delay, width and settling time.
Why
The pieces are correct individually and coupled in their requirements: widening the adder for a larger range lengthens the carry chain, which lengthens the critical path, which lowers the clock, so a decision about range has become a decision about speed. Which is why hardware design proceeds by iteration, since the critical path is a property of the whole rather than of any part.
Practise Integrated Digital-System Reasoning
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