A Whole Digital System
Every concept in this unit assembles into the standard shape of a digital system: a datapath (combinational logic plus registers that move and transform data) directed by a control unit (a finite state machine that says what to do each cycle). This datapath-plus-control structure is exactly how a CPU — and countless smaller systems — is organized.
Trace a simple example: a circuit that reads a number, and on each clock tick adds a fixed step, stopping when it reaches a target. It needs:
- A register (flip-flops) to hold the current value — sequential.
- An adder (combinational) to compute current + step.
- A comparator (combinational) to test whether the target is reached.
- A control FSM with states like running and done, advancing on the clock, that enables the register while running and halts at the target.
- A clock to advance the whole system one well-defined step per tick, within the period the critical path allows.
Every unit theme appears: gates and boolean logic build the adder and comparator; minimisation keeps them cheap; sequential logic and flip-flops hold state; timing analysis sets the clock speed; and an HDL would describe it all behaviorally for synthesis.
The unifying lesson is that digital systems are built by composition and abstraction: gates form blocks (adders, MUXes), blocks form a datapath, a control FSM sequences it, and a clock disciplines the whole. Each layer hides the one below, so a designer reasons at the level that matters — the same layered structure that lets a few boolean values, disciplined by a clock, become a working computer.
Common pitfall: trying to reason about a whole digital system at the individual-gate level. Real design works by composition — think in terms of blocks (registers, adders, an FSM controller) and their interfaces, not thousands of gates. Descend to the gate level only when a specific block or timing path needs it; otherwise reason about the datapath and control abstractly.